Method and system for generating soft-information after a single read in NAND flash using expected and measured values

ABSTRACT

A system and method for determining soft read data for a group of cells in a nonvolatile flash memory are disclosed. An expected value representative of a plurality of stored values in a group of cells is obtained. A measured value representative of the plurality of stored values in the group of cells is obtained, based on a single read to the group of cells. A soft read data for the group of cells is determined based at least in part on the expected value and the measured value. The expected and measured values may include at least one of a number of 0s, a number of 1s, a ratio of 0s to 1s or a ratio of 1s to 0s. A reliability for a bit i may be obtained using a one-step majority logic decoder, and a threshold reliability may be used when determining the soft read data.

CROSS REFERENCE TO OTHER APPLICATIONS

This application claims priority to U.S. Provisional Patent ApplicationNo. 61/635,653 entitled GENERATING SOFT-INFORMATION AFTER A SINGLE READIN NAND FLASH filed Apr. 19, 2012 which is incorporated herein byreference for all purposes.

BACKGROUND OF THE INVENTION

Solid state storage systems (such as NAND Flash storage) do not nativelyreturn soft values when read. When a read is performed on NAND Flashstorage, a read threshold is specified. Cells in a page having a voltagelower than the read threshold are reported as having a first hard readvalue (e.g., a 1) and cells in the page having a voltage higher than theread threshold are reported as having a second hard read value (e.g., a0). Although techniques exist to generate soft read data from two ormore reads, generating soft read data from a single read is moreattractive (e.g., because it consumes less power and fewer input/output(I/O) resources). Better quality soft read data would, for example,improve various system performance measurements, such as bit error rateor sector failure rate.

BRIEF DESCRIPTION OF THE DRAWINGS

Various embodiments of the invention are disclosed in the followingdetailed description and the accompanying drawings.

FIG. 1 is a flowchart illustrating an embodiment of a process forgenerating soft read data for a group of cells from a single read.

FIG. 2 is a diagram showing an embodiment of distributions associatedwith a group of cells.

FIG. 3 is a diagram showing read errors in one embodiment.

FIG. 4A is a flowchart illustrating an embodiment of a process forselecting one of three possible LLR₁ values for cells in a page.

FIG. 4B is a flowchart illustrating an embodiment of a more generalizedprocess for selecting one of three possible LLR values for cellsinterpreted to have a first bit value.

FIG. 5A is a flowchart illustrating an embodiment of a process forselecting one of three possible LLR₀ values for cells in a page.

FIG. 5B is a flowchart illustrating an embodiment of a more generalizedprocess for selecting one of three possible LLR values for cellsinterpreted to have a second bit value.

FIG. 6A is a flowchart illustrating an embodiment of a process fordetermining soft read data based at least in part on an expected value,a measured value, and a reliability.

FIG. 6B is a flowchart illustrating an embodiment of a generalizedprocess for determining soft read data based at least in part on anexpected value, a measured value, and a reliability.

FIG. 7 is a diagram showing an embodiment of a system configured togenerate soft read data based at least in part on a measured value andan expected value.

DETAILED DESCRIPTION

The invention can be implemented in numerous ways, including as aprocess; an apparatus; a system; a composition of matter; a computerprogram product embodied on a computer readable storage medium; and/or aprocessor, such as a processor configured to execute instructions storedon and/or provided by a memory coupled to the processor. In thisspecification, these implementations, or any other form that theinvention may take, may be referred to as techniques. In general, theorder of the steps of disclosed processes may be altered within thescope of the invention. Unless stated otherwise, a component such as aprocessor or a memory described as being configured to perform a taskmay be implemented as a general component that is temporarily configuredto perform the task at a given time or a specific component that ismanufactured to perform the task. As used herein, the term ‘processor’refers to one or more devices, circuits, and/or processing coresconfigured to process data, such as computer program instructions.

A detailed description of one or more embodiments of the invention isprovided below along with accompanying figures that illustrate theprinciples of the invention. The invention is described in connectionwith such embodiments, but the invention is not limited to anyembodiment. The scope of the invention is limited only by the claims andthe invention encompasses numerous alternatives, modifications andequivalents. Numerous specific details are set forth in the followingdescription in order to provide a thorough understanding of theinvention. These details are provided for the purpose of example and theinvention may be practiced according to the claims without some or allof these specific details. For the purpose of clarity, technicalmaterial that is known in the technical fields related to the inventionhas not been described in detail so that the invention is notunnecessarily obscured.

FIG. 1 is a flowchart illustrating an embodiment of a process forgenerating soft read data for a group of cells from a single read. Inthe example shown, a group of cells (e.g., a page) in solid statestorage (e.g., NAND Flash) is read and soft read data for each of thecells in the group are generated from that single read. In some examplesdescribed herein, soft read data comprises a log-likelihood ratio (LLR)where the sign (e.g., + or −) corresponds to a decision (e.g., a 1 or a0) and the magnitude corresponds to a likelihood, certainty, orprobability associated with that decision. For example, a largermagnitude may indicate a stronger certainty in the correspondingdecision for a given cell. Although LLR examples are described herein,any type of soft data or representation may be used.

At step 100 in FIG. 1, an expected value representative of a pluralityof stored values in a group of cells is obtained. In one example, when apage is written, an expected value representative of the plurality ofstored values written to that page is stored in some table or memory andstep 100 includes accessing that table or memory and obtaining thestored value. In various embodiments, an expected value obtained at step100 includes a number of 0s written to a page, a number of 1s written toa page, a ratio of 0s to 1s written to a page, or a ratio of 1s to 0swritten to a page.

At step 102, a measured value representative of the plurality of storedvalues in the group of cells is obtained based on a single read to thegroup of cells. For example, a single read of a page is performed inorder to obtain hard read data. In various embodiments, a measured valuecomprises a number of 0s read back from the page, a number of 1s readback from the page, a ratio of 0s to 1s read back from the page, or aratio of 1s to 0s read back from the page based on the hard read data.The technique described herein is independent of how a read threshold(e.g., used at step 102 to perform the read) is generated and anyappropriate read threshold generation technique or optimal readthreshold estimation technique may be used.

Soft read data for the group of cells is determined based at least inpart on the expected value and the measured value at step 104. In someembodiments, cells which are interpreted to have a certain bit value(e.g., a 0 or a 1) are assigned the same LLR value (e.g., the same LLR₀value or the same LLR₁ value). In some embodiments, a first cell, whichis interpreted to have a certain bit value (e.g., a 0 or a 1), isassigned a different LLR value than another cell which is alsointerpreted to have the same bit value. For example, a first cell may beassigned an LLR₁ value of LLR₁ ¹ and a second cell may be assigned anLLR₁ value of LLR₁ ². Various embodiments of step 104 are described infurther detail below.

FIG. 2 is a diagram showing an embodiment of distributions associatedwith a group of cells. In the example shown, distribution 200 isassociated with cells which (actually) store a 1 and distribution 202 isassociated with cells which (actually) store a 0. In variousembodiments, the y-axis shown corresponds to the number of cells storinga given voltage (e.g., as in a histogram) or a probability (e.g., as ina probability distribution function). Although examples described hereinassume that lower voltages correspond to a bit value of 1 and highervoltages correspond to a bit value of 0 (as shown in this example), thisis not intended to be limiting and any relationship between voltage andbit values may be used.

In the example shown, three example read thresholds are shown: T₀ (220),T₁ (221), and T₂ (222), where T₀<T₁<T₂. T₁ (221) corresponds to thecrossing point of distributions 200 and 202 and is referred to as anoptimal read threshold because it returns read data corresponding to thefewest number of bit errors (i.e., it minimizes the sum of the number ofcells which actually store a 1 but which are read as a 0 plus the numberof cells which actually store a 0 but which are read as a 1).

If reads are performed at read thresholds 220-222, the values shown inTable 1 would be obtained. As used herein, Z refers to a number of 0s(e.g., read at a particular read threshold, expected, measured, etc.), Orefers to a number of 1s (e.g., read at a particular read threshold,expected, measured, etc.), RZO refers to a ratio of 0s to 1s (e.g., readat a particular read threshold, expected, measured, etc.), and ROZrefers to a ratio of is to 0s (e.g., read at a particular readthreshold, expected, measured, etc.).

TABLE 1 Example ordering of values for FIG 2. Ordering of ValuesAssociated with Read Thresholds T₀, T₁, and T₂ Number of 0s ReadZ_(T0) > Z_(T1) > Z_(T2) Number of 1s Read O_(T0) < O_(T1) < O_(T2)Ratio of 0s to 1s Read RZO_(T0) > RZO_(T1) > RZO_(T2) Ratio of 1s to 0sRead ROZ_(T0) < ROZ_(T1) < ROZ_(T2)

The orderings (i.e., ascending/descending order) of values in Table 1may be determined by noting the following. As the read thresholdincreases (i.e., T₀→T₁→T₂), there is an increasing number of cells fromdistribution 200 (i.e., cells storing a 1) and from distribution 202(i.e., cells storing a 0) which are to the left of read thresholds T₀,then T₁, and then T₂. As a result, as the read threshold increases, thenumber of cells interpreted to have a 1 increases. This ordering isshown in the second row of Table 1. Conversely, the number of cellsinterpreted to have a 0 decreases as the read threshold increasesbecause fewer cells are to the right of the read threshold as the readthreshold increases from T₀ to T₁ to T₂. This relationship or orderingis shown in the first row of Table 1. The ordering of ratios (i.e.,RZO_(T0)>RZO_(T1)>RZO_(T2) and ROZ_(T0)<ROZ_(T1)<ROZ_(T2)) falls outfrom the ordering Z_(T0)>Z_(T1)>Z_(T2) and O_(T0)<O_(T1)<O_(T2).

Examination of Table 1 yields further insights when various expected andmeasured values are compared and these insights are shown in Table 2. Asused herein, RT refers to a read threshold (e.g., associated with anexpected value or a measured value), LLR₀ refers to an LLR valueassociated with cell(s) associated with a 0 (e.g., an LLR value assignedto cells which are interpreted as having a 0) and LLR₁ refers to an LLRvalue associated with cell(s) associated with a 1 (e.g., an LLR valueassigned to cells which are interpreted as having a 1).

TABLE 2 Example comparison of expected and measured values. Comparisonof Read Thresholds associated Comparison of Expected with Expected andAdjustment to (e.g., Nominal or and Measured Values Measured ValuesDefault) Magnitude of LLR Number Z_(exp) > Z_(meas) RT_(meas) > RT_(exp)For LLR₀, increase magnitude. of 0s For LLR₁, decrease magnitude.Z_(exp) ≈ Z_(meas) RT_(meas) ≈ RT_(exp) For LLR₀, no change tomagnitude. For LLR₁, no change to magnitude. Z_(exp) < Z_(meas)RT_(meas) < RT_(exp) For LLR₀, decrease magnitude. For LLR₁, increasemagnitude. Number O_(exp) > O_(meas) RT_(meas) < RT_(exp) For LLR₀,decrease magnitude. of 1s For LLR₁, increase magnitude. O_(exp) ≈O_(meas) RT_(meas) ≈ RT_(exp) For LLR₀, no change to magnitude. ForLLR₁, no change to magnitude. O_(exp) < O_(meas) RT_(meas) > RT_(exp)For LLR₀, increase magnitude. For LLR₁, decrease magnitude. Ratio ofRZO_(exp) > RZO_(meas) RT_(meas) > RT_(exp) For LLR₀, increasemagnitude. 0s to 1s For LLR₁, decrease magnitude. RZO_(exp) ≈ RZO_(meas)RT_(meas) ≈ RT_(exp) For LLR₀, no change to magnitude. For LLR₁, nochange to magnitude. RZO_(exp) < RZO_(meas) RT_(meas) < RT_(exp) ForLLR₀, decrease magnitude. For LLR₁, increase magnitude. Ratio ofROZ_(exp) > ROZ_(meas) RT_(meas) < RT_(exp) For LLR₀, decreasemagnitude. ls to 0s For LLR₁, increase magnitude. ROZ_(exp) ≈ ROZ_(meas)RT_(meas) ≈ RT_(exp) For LLR₀, no change to magnitude. For LLR₁, nochange to magnitude. ROZ_(exp) < ROZ_(meas) RT_(meas) > RT_(exp) ForLLR₀, increase magnitude. For LLR₁, decrease magnitude.

In the first row in Table 2, Z_(exp) and Z_(meas) are compared andZ_(exp)>Z_(meas). The second column from the right describes whether aread threshold associated with a measured value is to the right (i.e.,greater than) or to the left (i.e., less than) of a read thresholdassociated with an expected value. If the expected value (in thisexample, Z_(exp)) is associated with optimal read threshold 221 in FIG.2, then read thresholds 220 and 222 represent the two possibilities(i.e., that the read threshold associated with a measured value isgreater than or less than a read threshold associated with an expectedvalue). For the case where Z_(exp)>Z_(meas), the read thresholdassociated with the measured value Z_(meas) is i greater than theoptimal read threshold (i.e., Z_(meas)

read threshold 222 when Z_(exp)>Z_(meas)). This is because when goingfrom optimal read threshold 221 to read threshold 222, the number of 0sread back decreases (i.e., because fewer cells in distributions 200 and202 are to the right of read threshold 222 compared to when optimal readthreshold 221 is used); this corresponds to the relationship whereZ_(exp) is greater than Z_(meas).

The rightmost column in Table 2 relates to adjustments to a nominal ordefault magnitude of an LLR value. FIG. 3 is a diagram showing readerrors in one embodiment. In this example, the case whereZ_(exp)>Z_(meas) is shown so that optimal read threshold 321 correspondsto Z_(exp) and read threshold 322 corresponds to Z_(meas). Diagram 310shows errors for cells read back as a 0 and diagram 360 shows errors forcells read back as a 1. For clarity, distributions 300 and 302 are shown“zoomed in” and portions of the distributions which do not affect therelevant errors are not shown. Also for clarity, distribution 300 (i.e.,cells which actually store a 1) is shown with a dashed line anddistribution 302 (i.e., cells which actually store a 0) is shown with adashed and dotted line.

In diagram 310, when optimal read threshold 321 (corresponding toZ_(exp)) is used to perform a read, the cells which actually store a 1but which are interpreted as a 0 (i.e., errors for cells read as a 0)are represented by error region 342 with vertical lines. When readthreshold 322 (corresponding to Z_(meas)) is used to perform a read, thecells which actually store a 1 but which are interpreted as a 0 arerepresented by error region 340 with horizontal lines.

The relative areas of error regions 340 and 342 (i.e., the area of errorregion 342>the area of error region 340) suggests that for cells whichare read back as a 0, a nominal or default magnitude for an LLR₀ valueshould be increased. Put another way, for the case whereZ_(exp)>Z_(meas), if a cell is interpreted to have a 0 (i.e., using readthreshold 322), that interpretation has reduced probability of being oneof the incorrectly interpreted ones and thus it may be desirable toincrease a nominal or default likelihood for that case. This correspondsto increasing a nominal or default magnitude of LLR₀, as is shown in therightmost column in the first row in Table 2.

Diagram 360 shows errors for cells read as a 1 when Z_(exp)>Z_(meas). Inthis example, cells which actually store a 0 and which are incorrectlyinterpreted as a 1 when optimal read threshold 321 is used are shown inerror region 372 with horizontal lines. Error region 370 (shown withvertical lines) represents cells which actually store a 0 and which areincorrectly interpreted as a 1 when read threshold 322 is used. Thus,when going from Z_(exp) to Z_(meas), the number of errors for cellsinterpreted as a 1 has increased. As such, this suggests a decrease to anominal or default magnitude of LLR₁ for this case, as is shown in thefirst row, rightmost column in Table 2, since the likelihood of anincorrectly interpreted 1 has increased.

Returning to Table 2, for the case where Z_(exp)≈Z_(meas), the readthreshold associated with the measured value is fairly close to the readthreshold associated with the optimal read threshold. As such, thissuggests no change to a default or nominal LLR₀ or LLR₁ magnitude. Therest of Table 2 may be populated using similar reasoning to thatdescribed above.

The following figures show an example where some of the observationsshown in Table 2 are used to generate soft read data based at least inpart on an expected value and a measured value.

FIG. 4A is a flowchart illustrating an embodiment of a process forselecting one of three possible LLR₁ values for cells in a page. In someembodiments, the example process is performed in step 104 in FIG. 1.Although the examples in the two following figures use a ratio of 0s to1s (i.e., RZO), any expected or measured value may be used (e.g., anumber of 0s (i.e., Z), a number of is (i.e., O), or a ratio of is to 0s(i.e., ROZ)).

At step 400, (RZO_(meas)−R_(ZOexp)) is compared against R₁ ¹ and R₁ ².For example, the values of R₁ ¹ and R₁ ² may be predetermined valueswhere R₁ ²<R₁ ¹. The comparison at step 400 has three possible results:(RZO_(meas)−RZO_(exp))≧R₁ ¹, R₁ ²≦(RZO_(meas)−RZO_(exp))<R₁ ¹, or(RZO_(meas)−RZO_(exp))<R₁ ².

If (RZO_(meas)−RZO_(exp))≧R₁ ¹, at step 402, for cells read back ashaving a 1, a LLR₁ of L₁ ^(max) is output, where |L₁ ²|<|L₁ ¹|<|L₁^(max)|. See, for example, the row in Table 2 whereRZO_(exp)<RZO_(meas); the rightmost column in that row indicates that anominal or default magnitude LLR₁ value should be increased. In thisexample, that corresponds to using L₁ ^(max) since of the three possibleLLR₁ values (i.e., L₁ ², L₁ ¹, or L₁ ^(max)), it has the largestmagnitude.

If R₁ ²≦(RZO_(meas)−RZO_(exp))<R₁ ¹, at step 404, for cells read back ashaving a 1, an LLR₁ of L₁ ¹ is output. See, for example, the row inTable 2 where RZO_(exp)≈RZO_(meas). As the rightmost column indicates,there is no change to a nominal or default magnitude for an LLR₁ value.When there are three possible LLR₁ values (i.e., L₁ ², L₁ ¹, or L₁^(max)), this corresponds to selecting the one with the medium or middlemagnitude, hence the selection of L₁ ¹ in step 404.

If (RZO_(meas)−RZO_(exp))<R₁ ², at step 406, for cells read back ashaving a 1, a LLR₁ of L₁ ² is output. In Table 2, for example, thiscorresponds to the row where RZO_(exp)>RZO_(meas). As the rightmostcolumn in that row indicates, a default or nominal magnitude of an LLR₁value is decreased. Since L₁ ² has the smallest magnitude of the threepossible LLR₁ values, L₁ ² is selected at step 406.

FIG. 4A is a flowchart that shows specific measured and expected values(i.e., RZO_(meas) and RZO_(exp)) and the specific case where a lowerrange of voltages is associated with a bit value of 1 and an upper rangeof voltages is associated with a bit value of 0. FIG. 4B is a flowchartillustrating an embodiment of a more generalized process for selectingone of three possible LLR values for cells interpreted to have a firstbit value. FIG. 4B shows a more generalized form of FIG. 4A where alower range of voltages is associated with a first bit value and anupper range of voltages is associated with a second bit value. At step450, a difference between a measured value and an expected value, afirst threshold, and a second threshold are compared. If the comparisoncorresponds to a first range where a read threshold associated with ameasured value is greater than a read threshold associated with anexpected value, at step 452, for cells read back as having a first bitvalue, a LLR of L_(C) is output, where |L_(A)|<|L_(B)|<|L_(C)|. If thecomparison at step 450 corresponds to a second range where a readthreshold associated with a measured value is approximately equal to aread threshold associated with an expected value, then at step 454, forcells read back as having a first bit value, a LLR of L_(B) is output.If the comparison at step 450 corresponds to a third range where a readthreshold associated with a measured value is less than a read thresholdassociated with an expected value, for cells read back as having a firstbit value, a LLR of L_(A) is output at step 456.

FIG. 5A is a flowchart illustrating an embodiment of a process forselecting one of three possible LLR₀ values for cells in a page. FIG. 5Ais a counterpart process to FIG. 4A and may be performed with or inparallel to FIG. 4A. In some embodiments, FIG. 5A process is performedin step 104 in FIG. 1.

At step 500, (RZO_(exp)−RZO_(meas)) is compared against R₀ ¹ and R₀ ².Note that the difference used in step 500 (i.e., (RZO_(exp)−RZO_(meas)))will have an opposite sign as the difference used in step 400 in FIG. 4A(i.e., RZO_(meas)−RZO_(exp)). As in the previous example, R₀ ¹ and R₀ ²may be predetermined values, where R₀ ²<R₀ ¹.

If (RZO_(exp)−RZO_(meas))≧R₀ ¹, at step 502, for cells read back ashaving a 0, a LLR₀ of L₀ ^(max) is output, where |L₀ ²|<|L₀ ¹|<L₀^(max)|. In Table 2, for example, this corresponds to the row whereRZO_(exp)>RZO_(meas) and, as the rightmost column indicates, a nominalor default magnitude for LLR₀ is increased. As a result, since L₀ ^(max)has the largest magnitude of the three possible LLR₀ values, L₀ ^(max)is selected.

If R₀ ²≦(RZO_(exp)−RZO_(meas))<R₀ ¹, at step 504, for cells read back ashaving a 0, a LLR₀ of L₀ ¹ is output. An example of this in Table 2 isRZO_(exp)≈RZO_(meas) where a nominal or default magnitude of an LLR₀value is not changed. This corresponds to selecting (of three possibleLLR₀ values), the one with the medium or middle magnitude.

If (RZO_(exp)−RZO_(meas))<R₀ ², at step 506, for cells read back ashaving a 0, a LLR₀ of L₀ ² is output. In Table 2, this corresponds toRZO_(exp)<RZO_(meas) and, as indicated in the rightmost column, anominal or default magnitude is decreased for LLR₀. This corresponds toselecting, from three possible LLR₀ values, the one having the smallestmagnitude (i.e., L₀ ²).

As with FIG. 4A, a more generalized form of FIG. 5A may be obtained.FIG. 5B is a flowchart illustrating an embodiment of a more generalizedprocess for selecting one of three possible LLR values for cellsinterpreted to have a second bit value. At step 550, a differencebetween a measured value and an expected value, a first threshold, and asecond threshold are compared. If the comparison corresponds to a firstrange where a read threshold associated with a measured value is lessthan a read threshold associated with an expected value, then at step552, for cells read back as having a second bit value, a LLR of L_(Z) isoutput, where |L_(X)|<L_(Y)|<L_(Z)|. If the comparison at step 550corresponds to a second range where the read threshold associated withthe measured value is approximately equal to the read thresholdassociated with the expected value, for cells read back as having asecond bit value, a LLR of L_(Y) is output at step 554. If thecomparison at step 550 corresponds to a third range where the readthreshold associated with the measured value is greater than the readthreshold associated with the expected value, at step 556, for cellsread back as having a second bit value, a LLR of L_(X) is output.

Although FIGS. 4A-5B show three possible LLR values/ranges, any numberof possible LLR values may be used. For example, additional thresholds(e.g., R₀ ³/R₁ ³, R₀ ⁴/R₁ ⁴, etc.) may be used and additional possibleLLR values (e.g., L₀ ³/L₁ ³, L₀ ⁴/L₁ ⁴, etc.) may be used.

FIGS. 4A-5B show examples where cells which are interpreted to have agiven value (e.g., a 0 or a 1) are assigned the same LLR value. In someother embodiments, two cells may be interpreted to have the same value,but are assigned different LLR values. The following figure shows onesuch embodiment.

FIG. 6A is a flowchart illustrating an embodiment of a process fordetermining soft read data based at least in part on an expected value,a measured value, and a reliability. In some embodiments, the exampleprocess is performed at step 104 in FIG. 1.

At step 600, i is initialized to 0. At step 601, for bit i, areliability (∇_(i)) and a hard read data (r_(i)) are obtained. Forexample, the hard read data for that bit may be a 0 or a 1 and thereliability may be obtained from a one-step majority logic decoder,which is a type of low complexity low-density parity-check (LDPC)decoder. For convenience, a brief overview of a one-step majority logicdecoder is described herein. Given a LDPC code C with parity checkmatrix H={h_(i,j)} where 0≦i<m and 0≦j<n, the following two index setsmay be defined: N_(i)={j: 0≦j<n, h_(i),j=1} and M_(j)={i: 0≦i<m,h_(i,j)=1}. For a received hard read sequence r={r₀, . . . , r_(n-1)}(i.e., where each r₁ is either a 0 or a 1), the majority logic decodercreates syndrome sums

$s_{i} = {\sum\limits_{j \in N_{i}}{r_{j}h_{i,j}}}$for 0≦i<m. For each bit j, the one step majority logic decodercalculates a reliability

${\Lambda_{j}:\Lambda_{j}} = {\sum\limits_{i \in M_{j}}\left( {{2\; s_{i}} - 1} \right)}$for 0≦j<n. Using a one-step majority logic decoder is attractive becauseit uses only combinatorial logic (i.e., it does not include any flipflops or registers), has low complexity, and/or is fast. Other types ofdecoders which have similar properties (e.g., they use onlycombinatorial logic, have low complexity and/or are fast) may be used insome other embodiments.

At step 602, the hard read data (r₁) is evaluated. If r_(i)=1, it isdetermined at step 604 if a measured ratio of 0s to 1s (RZO_(meas)) is iless than an expected ratio of 0s to 1s (RZO_(exp)) and the reliabilityfor bit i (∇_(i)) is greater than a reliability threshold (∇_(τ)). Ifso, for bit i, a LLR_(i) of L₁′ is output where |L₁′|<|L₁ ^(max)| atstep 608. If at step 604 either (RZO_(meas)≧RZO_(exp)) or (∇_(i)≦∇_(τ))then at step 610 for bit i, a LLR_(i) of L₁ ^(max) is output.

If at step 602 the hard read data for bit i is 0, then it is determinedat step 606 if (RZO_(meas)>RZO_(exp)) and (∇_(i)>∇_(τ)). If so, for biti, a LLR_(i) of L₀′ is output, where |L₀′|<|L₀ ^(max)|, at step 612. Ifat step 606 either (RZO_(meas)≦RZO_(exp)) or (∇_(i)≦∇_(τ)) then at step614 for bit i, a LLR_(i) of L₀ ^(max) is output.

After outputting a LLR_(i) at steps 608, 610, 612, or 614, it isdetermined at step 616 if there are more bits. For example, if there aren bits indexed from 0 through (n−1) then the decision at step 616 is yesif i<(n−1). If there are more bits, i is incremented at step 618 and theprocess returns to step 601.

As with FIGS. 4A and 5A, FIG. 6A may be generalized (e.g., using Table2) to include other types of measured/expected values (e.g., O, Z, ROZ,etc.) and other bit assignments to voltage ranges. FIG. 6B is aflowchart illustrating an embodiment of a generalized process fordetermining soft read data based at least in part on an expected value,a measured value, and a reliability. At step 650, i is initialized to 0.At step 651, a reliability and a hard read value are obtained for bit i.At step 652, r_(i) is evaluated. If r_(i) is a first bit value, it isdetermined at step 654 if (RT_(meas)>RT_(exp)) and (∇_(i)>∇_(τ)). Theordering or comparison of the read thresholds (i.e., whether RT_(meas)is greater than RT_(exp)) may be determined by comparing the expectedvalue and the measured value (e.g., comparing various Z values, Ovalues, RZO values, or ROZ values). If so, for bit i, a LLR_(i) of L_(A)is output where |L_(A)|<|L_(B)| at step 658. If not, a LLR_(i) of L_(B)is output for bit i at step 660. If at step 652 r _(i) is a second bitvalue, it is determined at step 656 if (RT_(meas)<RT_(exp)) and(∇_(i)>∇_(τ)). If so, for bit i, a LLR_(i) of L_(X) is output, where|L_(X)|<|L_(Y)| at step 662. If not, at step 664, for bit i, a LLR_(i)of L_(Y) is output. After outputting a LLR at steps 658, 660, 662, or664, it is determined if there are more bits at step 666. If so, i isincremented at step 668 and the process returns to step 651.

FIG. 7 is a diagram showing an embodiment of a system configured togenerate soft read data based at least in part on a measured value andan expected value. In some embodiments, at least some portion of thesystem shown is implemented on or using a semiconductor device, such asa field-programmable gate array (FPGA) or an application-specificintegrated circuit (ASIC). For brevity, some system components unrelatedto the technique described herein may not be shown herein.

Write processor 700 generates write data and stores it in solid statestorage 740. When writing data to solid state storage 740, writeprocessor stores an expected value which indicates an actual count orratio of values written to memory 720. In various embodiments, anexpected value written to memory 720 includes a number of 0s written, anumber of 1s written, a ratio of 0s to 1s written, or a ratio of 1s to0s written. In some embodiments, read processor 760 will want to knowexpected values for a given page, and so the expected values are passedto memory 720 with a write address indicating the page which waswritten.

When a read is performed on solid state storage 740, read thresholdgenerator 762 generates a read threshold which is used to read solidstate storage 740. Any appropriate read threshold generation techniquemay be used and the technique described herein is independent of how aread threshold is generated.

If read processor 760 is configured to perform the processes of FIG. 4A,4B, 5A, or 5B, then it is not necessary to have one step majority logicdecoder 764 and the hard read data is passed to single read soft datagenerator 766. The hard read data is used by single read soft datagenerator 766 to generate a measured value representative of storedvalues for a desired page. The expected value is passed from memory 720to single read soft data generator 766 when the desired read address(e.g., a page number) is specified. Single read soft data generator 766uses the expected value and measured value to perform the process ofFIG. 4A, 4B, 5A, or 5B and outputs soft read data. The soft read datamay be passed to soft input error correction decoder 768 whichcorresponds to error correction encoder 702 in write processor 700. Insome embodiments, error correction encoder 702 is an LDPC encoder andsoft input error correction decoder 768 is an LDPC decoder.

If read processor 760 is configured to perform the processes of FIG. 6Aor 6B, then one step majority logic decoder 764 generates reliabilitiesusing the hard read data from solid state storage 740. The hard readdata is also passed to single read soft data generator 766 whichgenerates a measured value (e.g., a ratio of 0s to 1s read from storage740, a ratio of 1s to 0s read from storage 740, a number of 1s read fromstorage 740, or a number of 0s read from storage 740) from the hard readdata. Single read soft data generator 766 then generates a soft readdata according the process of FIG. 6A or 6B using the expected valuefrom memory 720, the reliabilities from one step majority logic decoder764, and the measured value generated from the hard read data from solidstate storage 740. The soft read data is passed from single read softdata generator 766 to soft input error correction decoder 768.

Although the foregoing embodiments have been described in some detailfor purposes of clarity of understanding, the invention is not limitedto the details provided. There are many alternative ways of implementingthe invention. The disclosed embodiments are illustrative and notrestrictive.

What is claimed is:
 1. A method, comprising: obtaining an expected valuerepresentative of a plurality of stored values in a group of cells;obtaining a measured value representative of the plurality of storedvalues in the group of cells based on a single read to the group ofcells; and using a processor to determine soft read data for the groupof cells based at least in part on the expected value and the measuredvalue, including by: comparing: (1) a difference between the measuredvalue and the expected value, (2) a first threshold, and (3) a secondthreshold, wherein: a first bit value is associated with a lower rangeof voltages; and a second bit value is associated with an upper range ofvoltages; in the event the comparison corresponds to a first rangeassociated with a read threshold associated with the measured valuebeing greater than a read threshold associated with the expected value:for cells read back as having the first bit value, outputting a loglikelihood value (LLR) of L_(C), where |L_(A)|<|L_(B)|<|L_(C)|; and forcells read back as having the second bit value, outputting a LLR ofL_(X), where |L_(X)|<|L_(Y)|<|L_(Z)|; in the event the comparisoncorresponds to a second range associated with the read thresholdassociated with the measured value being equal to the read thresholdassociated with the expected value: for cells read back as having thefirst bit value, outputting a LLR of L_(B), where|L_(A)|<|L_(B)|<|L_(C)|; and for cells read back as having the secondbit value, outputting a LLR of L_(Y), where |L_(X)|<|L_(Y)|<|L_(Z)|; andin the event the comparison corresponds to a third range associated withthe read threshold associated with the measured value being less thanthe read threshold associated with the expected value: for cells readback as having the first bit value, outputting a LLR of L_(A), where|L_(A)|<|L_(B)|<|L_(C)|; and for cells read back as having the secondbit value, outputting a LLR of L_(Z), where |L_(X)|<|L_(Y)|<|L_(Z)|. 2.The method of claim 1, wherein: the expected value includes one or moreof the following: a number of 0s written, a number of 1s written, aratio of 0s to 1s written, or a ratio of 1s to 0s written; and themeasured value includes one or more of the following: a number of 0sread, a number of 1s read, a ratio of 0s to 1s read, or a ratio of 1s to0s read.
 3. The method of claim 1, wherein the method is performed by asemiconductor device, including one or more of the following: afield-programmable gate array (FPGA) or an application-specificintegrated circuit (ASIC).
 4. A method, comprising: obtaining anexpected value representative of a plurality of stored values in a groupof cells; obtaining a measured value representative of the plurality ofstored values in the group of cells based on a single read to the groupof cells; using a one-step majority logic decoder to obtain areliability for bit i; and using a processor to determine soft read datafor the group of cells based at least in part on the expected value, themeasured value, the reliability for bit i, a hard read value for bit i,and a threshold reliability, including by: comparing the expected valueand the measured value; comparing the threshold reliability and thereliability for bit i, wherein: a first bit value is associated with alower range of voltages; and a second bit value is associated with anupper range of voltages; in the event the hard read value for bit i isthe first bit value: in the event (1) the comparison of the expectedvalue and the measured value corresponds to a read threshold associatedwith the measured value being greater than a read threshold associatedwith the expected value and (2) the reliability for bit i is greaterthan the threshold reliability, outputting a log-likelihood ratio (LLR)of L_(A), where |L_(A)|<|L_(B)|; and otherwise, outputting a LLR ofL_(B); and in the event the hard read value for bit i is the second bitvalue: in the event (1) the comparison of the expected value and themeasured value corresponds to a read threshold associated with themeasured value being less than a read threshold associated with theexpected value and (2) the reliability for bit i is greater than thethreshold reliability, outputting a log-likelihood ratio (LLR) of L_(X),where |L_(X)|<|L_(Y)|; and otherwise, outputting a LLR of L_(Y).
 5. Themethod of claim 4, wherein: the expected value includes one or more ofthe following: a number of 0s written, a number of 1s written, a ratioof 0s to 1s written, or a ratio of 1s to 0s written; and the measuredvalue includes one or more of the following: a number of 0s read, anumber of 1s read, a ratio of 0s to 1s read, or a ratio of 1s to 0sread.
 6. The method of claim 4, wherein the method is performed by asemiconductor device, including one or more of the following: afield-programmable gate array (FPGA) or an application-specificintegrated circuit (ASIC).
 7. A system, comprising: a memory; and asingle read soft data generator configured to: obtain, from the memory,an expected value representative of a plurality of stored values in agroup of cells; obtain a measured value representative of the pluralityof stored values in the group of cells based on a single read to thegroup of cells; and determine soft read data for the group of cellsbased at least in part on the expected value and the measured value,including by: comparing: (1) a difference between the measured value andthe expected value, (2) a first threshold, and (3) a second threshold,wherein: a first bit value is associated with a lower range of voltages;and a second bit value is associated with an upper range of voltages; inthe event the comparison corresponds to a first range associated with aread threshold associated with the measured value being greater than aread threshold associated with the expected value: for cells read backas having the first bit value, outputting a log likelihood value (LLR)of L_(C), where |L_(A)|<|L_(B)|<|L_(C)|; and for cells read back ashaving the second bit value, outputting a LLR of L_(X), where|L_(X)|<|L_(Y)|<|L_(Z)|; in the event the comparison corresponds to asecond range associated with the read threshold associated with themeasured value being equal to the read threshold associated with theexpected value: for cells read back as having the first bit value,outputting a LLR of L_(B), where |L_(A)|<|L_(B)|<L_(C)|; and for cellsread back as having the second bit value, outputting a LLR of L_(Y),where |L_(X)|<L_(Y)|<|L_(Z)|; and in the event the comparisoncorresponds to a third range associated with the read thresholdassociated with the measured value being less than the read thresholdassociated with the expected value: for cells read back as having thefirst bit value, outputting a LLR of L_(A), where|L_(A)|<|L_(B)|<|L_(C)|; and for cells read back as having the secondbit value, outputting a LLR of L_(Z), where |L_(X)|<|L_(Y)|<|L_(Z)|. 8.The system of claim 7, wherein: the expected value includes one or moreof the following: a number of 0s written, a number of 1s written, aratio of 0s to 1s written, or a ratio of 1s to 0s written; and themeasured value includes one or more of the following: a number of 0sread, a number of 1s read, a ratio of 0s to 1s read, or a ratio of 1s to0s read.
 9. The system of claim 7, wherein the system is implementedusing a semiconductor device, including one or more of the following: afield-programmable gate array (FPGA) or an application-specificintegrated circuit (ASIC).
 10. A system, comprising: a memory; aone-step majority logic decoder configured to obtain a reliability forbit i; and a single read soft data generator configured to: obtain, fromthe memory, an expected value representative of a plurality of storedvalues in a group of cells; obtain a measured value representative ofthe plurality of stored values in the group of cells based on a singleread to the group of cells; and determine soft read data for the groupof cells based at least in part on the expected value, the measuredvalue, the reliability for bit i, a hard read value for bit i, and athreshold reliability, including by: comparing the expected value andthe measured value; comparing the threshold reliability and thereliability for bit i, wherein: a first bit value is associated with alower range of voltages; and a second bit value is associated with anupper range of voltages; in the event the hard read value for bit i isthe first bit value: in the event (1) the comparison of the expectedvalue and the measured value corresponds to a read threshold associatedwith the measured value being greater than a read threshold associatedwith the expected value and (2) the reliability for bit i is greaterthan the threshold reliability, outputting a log-likelihood ratio (LLR)of L_(A), where |L_(A)|<|L_(B)|; and otherwise, outputting a LLR ofL_(B); and in the event the hard read value for bit i is the second bitvalue: in the event (1) the comparison of the expected value and themeasured value corresponds to a read threshold associated with themeasured value being less than a read threshold associated with theexpected value and (2) the reliability for bit i is greater than thethreshold reliability, outputting a log-likelihood ratio (LLR) of L_(X),where |L_(X)|<|L_(Y)|; and otherwise, outputting a LLR of L_(Y).
 11. Thesystem of claim 10, wherein: the expected value includes one or more ofthe following: a number of 0s written, a number of 1s written, a ratioof 0s to 1s written, or a ratio of 1s to 0s written; and the measuredvalue includes one or more of the following: a number of 0s read, anumber of 1s read, a ratio of 0s to 1s read, or a ratio of 1s to 0sread.
 12. The system of claim 10, wherein the system is implementedusing a semiconductor device, including one or more of the following: afield-programmable gate array (FPGA) or an application-specificintegrated circuit (ASIC).
 13. A computer program product, the computerprogram product being embodied in a non-transitory computer readablestorage medium and comprising computer instructions for: obtaining anexpected value representative of a plurality of stored values in a groupof cells; obtaining a measured value representative of the plurality ofstored values in the group of cells based on a single read to the groupof cells; and determining soft read data for the group of cells based atleast in part on the expected value and the measured value, includingby: comparing (1) a difference between the measured value and theexpected value, (2) a first threshold, and (3) a second threshold,wherein: a first bit value is associated with a lower range of voltages;and a second bit value is associated with an upper range of voltages; inthe event the comparison corresponds to a first range associated with aread threshold associated with the measured value being greater than aread threshold associated with the expected value: for cells read backas having the first bit value, outputting a log likelihood value (LLR)of L_(C), where |L_(A)|<|L_(B)|<|L_(C)|; and for cells read back ashaving the second bit value, outputting a LLR of L_(X), where|L_(X)|<|L_(Y)|<|L_(Z)|; in the event the comparison corresponds to asecond range associated with the read threshold associated with themeasured value being equal to the read threshold associated with theexpected value: for cells read back as having the first bit value,outputting a LLR of L_(B), where |L_(A)|<|L_(B)|<|L_(C)|; and for cellsread back as having the second bit value, outputting a LLR of L_(Y),where |L_(X)|<|L_(Y)|<|L_(Z)|; and in the event the comparisoncorresponds to a third range associated with the read thresholdassociated with the measured value being less than the read thresholdassociated with the expected value: for cells read back as having thefirst bit value, outputting a LLR of L_(A), where|L_(A)|<|L_(B)|<|L_(C)|; and for cells read back as having the secondbit value, outputting a LLR of L_(Z), where |L_(X)|<|L_(Y)|<|L_(Z)|. 14.The computer program product of claim 13, wherein: the expected valueincludes one or more of the following: a number of 0s written, a numberof 1s written, a ratio of 0s to 1s written, or a ratio of 1s to 0swritten; and the measured value includes one or more of the following: anumber of 0s read, a number of 1s read, a ratio of 0s to 1s read, or aratio of 1s to 0s read.
 15. A computer program product, the computerprogram product being embodied in a non-transitory computer readablestorage medium and comprising computer instructions for: obtaining anexpected value representative of a plurality of stored values in a groupof cells; obtaining a measured value representative of the plurality ofstored values in the group of cells based on a single read to the groupof cells; using a one-step majority logic decoder to obtain areliability for bit i; and determining soft read data for the group ofcells based at least in part on the expected value, the measured value,the reliability for bit i, a hard read value for bit i, and a thresholdreliability, including by: comparing the expected value and the measuredvalue; comparing the threshold reliability and the reliability for biti, wherein: a first bit value is associated with a lower range ofvoltages; and a second bit value is associated with an upper range ofvoltages; in the event the hard read value for bit i is the first bitvalue: in the event (1) the comparison of the expected value and themeasured value corresponds to a read threshold associated with themeasured value being greater than a read threshold associated with theexpected value and (2) the reliability for bit i is greater than thethreshold reliability, outputting a log-likelihood ratio (LLR) of L_(A),where |L_(A)|<|L_(B)|; and otherwise, outputting a LLR of L_(B); and inthe event the hard read value for bit i is the second bit value: in theevent (1) the comparison of the expected value and the measured valuecorresponds to a read threshold associated with the measured value beingless than a read threshold associated with the expected value and (2)the reliability for bit i is greater than the threshold reliability,outputting a log-likelihood ratio (LLR) of L_(X), where |L_(X)|<|L_(Y)|;and otherwise, outputting a LLR of LY.
 16. The computer program productof claim 15, wherein: the expected value includes one or more of thefollowing: a number of 0s written, a number of 1s written, a ratio of 0sto 1s written, or a ratio of 1s to 0s written; and the measured valueincludes one or more of the following: a number of 0s read, a number of1s read, a ratio of 0s to 1s read, or a ratio of 1s to 0s read.